Top down IC design methodology emphasizing synthesis and automated physical design using CAD tools from Synopsys, in particular VCS for simulation, DC for logic synthesis and ICC for place and route. Several embedded core choices will be investigated, including cores from Opencores.com, from the FabScalar project, a simple 8051 8-bit core, a Sparc compatible Leon 32-bit core, and a modern multithredded multicore Sun Niagara design. The target technology will be a state of the art 90nm CMOS technology.